An Off-Chip ESD Protection for High-Speed Interfaces - In Compliance Magazine
TVS is Just a Diode, Right? Part Two
Snapback behavior determines ESD protection effectiveness - SemiWiki
GGNMOS ESD Protection Simulation
Snapback behavior determines ESD protection effectiveness - SemiWiki
ON Semiconductor Is Now
Matching ESD protection to process geometry - Electronic Products
ESD clamps for high voltage, BCD processes – SOFICS – Solutions for ICs
The Transistor: An Indispensable ESD Protection Device - Part 2 - In Compliance Magazine
DF2BxM4ASL ESD Protection Diodes - Toshiba | Mouser
Figure 3 from A Study of Snapback and Parasitic Bipolar Action for ESD NMOS Modeling | Semantic Scholar
New subcircuit for ESD snapback simulation | Download Scientific Diagram
Influence of high-frequent signals on the hold current behaviour of snapback ESD protection diodes - YouTube
What does good ESD protection look like? | Efficiency Wins
Technical considerations and protection mechanism for ESD event...
Area-efficient, reduced and no-snapback PNP-based ESD protection in advanced Smart Power technology | Semantic Scholar
Time to say farewell to the snapback ggNMOS for ESD protection – SOFICS – Solutions for ICs
Figure 1 from Measurement on snapback holding voltage of high-voltage LDMOS for latch-up consideration | Semantic Scholar
SSZTAW9 Technical article | TI.com
Electronics | Free Full-Text | The ESD Characteristics of a pMOS-Triggered Bidirectional SCR in SOI BCD Technology
ESDS314: Surge/ESD Protection for USB Vbus - Interface forum - Interface - TI E2E support forums
ESD Protection - STMicroelectronics
Designer's task: ESD verification in large SoC designs - EDN Asia
Snapback behavior determines ESD protection effectiveness - SemiWiki
2 Snap-back I-V characteristic of common ESD device. | Download Scientific Diagram
